Von Neumann architecture

In most computer systems, the CPU receives instructions and data from an input or memory. The instructions and data are processed by the CPU and the results are either sent to an output or transferred to secondary storage. 'Architecture' is the design that enables the instructions and data to reach and be processed by the CPU.

Von Neumann architecture is the design upon which many general purpose computers are based. The key elements of Von Neumann architecture are:

  • data and instructions are both stored as binary.
  • data and instructions are both stored in main memory.
  • instructions are fetched from memory one at a time and in order - serially.
  • the processor decodes and executes an instruction, before cycling around to fetch the next instruction.
  • the cycle continues until no more instructions are available.

A processor based on Von Neumann architecture has five special registers which it uses for processing:

  • Program counter (PC) - holds the memory address of the next instruction to be fetched from main memory.
  • Memory address register (MAR) - holds the address of the current instruction that is to be fetched from memory, or the address in memory to which data is to be transferred.
  • Memory buffer register (MBR) - holds the contents found at the address held in the MAR, or data which is to be transferred to main memory. It is also referred to as the memory data register (MDR).
  • Current instruction register (CIR) - holds the instruction that is currently being decoded and executed.
  • Accumulator (ACC) - holds the data being processed and the results of processing.

Using the registers and the key elements of the Von Neumann architecture, we can now look at how an instruction is processed in the fetch-execute cycle.